Espressif Systems /ESP32-P4 /HP_SYS_CLKRST /PERI_CLK_CTRL02

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Interpret as PERI_CLK_CTRL02

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0REG_SDIO_LS_CLK_DIV_NUM 0 (REG_SDIO_LS_CLK_EDGE_CFG_UPDATE)REG_SDIO_LS_CLK_EDGE_CFG_UPDATE 0REG_SDIO_LS_CLK_EDGE_L 0REG_SDIO_LS_CLK_EDGE_H 0REG_SDIO_LS_CLK_EDGE_N 0REG_SDIO_LS_SLF_CLK_EDGE_SEL 0REG_SDIO_LS_DRV_CLK_EDGE_SEL 0REG_SDIO_LS_SAM_CLK_EDGE_SEL 0 (REG_SDIO_LS_SLF_CLK_EN)REG_SDIO_LS_SLF_CLK_EN 0 (REG_SDIO_LS_DRV_CLK_EN)REG_SDIO_LS_DRV_CLK_EN 0 (REG_SDIO_LS_SAM_CLK_EN)REG_SDIO_LS_SAM_CLK_EN 0REG_MIPI_DSI_DPHY_CLK_SRC_SEL

Description

Reserved

Fields

REG_SDIO_LS_CLK_DIV_NUM

Reserved

REG_SDIO_LS_CLK_EDGE_CFG_UPDATE

Reserved

REG_SDIO_LS_CLK_EDGE_L

Reserved

REG_SDIO_LS_CLK_EDGE_H

Reserved

REG_SDIO_LS_CLK_EDGE_N

Reserved

REG_SDIO_LS_SLF_CLK_EDGE_SEL

Reserved

REG_SDIO_LS_DRV_CLK_EDGE_SEL

Reserved

REG_SDIO_LS_SAM_CLK_EDGE_SEL

Reserved

REG_SDIO_LS_SLF_CLK_EN

Reserved

REG_SDIO_LS_DRV_CLK_EN

Reserved

REG_SDIO_LS_SAM_CLK_EN

Reserved

REG_MIPI_DSI_DPHY_CLK_SRC_SEL

Reserved

Links

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